This invention relates to a semiconductor test system with compact configuration.
A conventional semiconductor test system for testing semiconductor integrated circuit devices in packaged form includes a handler, a test head, a stand-alone manipulator and a power server.
The test head includes tester pins which are mounted in the test head on pin cards and are connected to respective pin electronics circuits. The pin electronics circuits generate stimulus signals for application to input pins of the device under test (DUT) and test or measure response signals provided at output pins of the DUT.
For testing, the DUT is fitted in a socket which is attached to a DUT board mounted in the handler. Generally, the test system is configured so that for normal testing the test head is positioned with its DUT engagement face, at which the tester pins are exposed, toward the DUT board. The tester pins engage the DUT board, which makes electrical connections between tester pins in the test head and the DUT.
The handler receives the packaged devices in containers, such as trays, at an input station, removes the devices from the tray and delivers them to a test station. At the test station, the packaged devices are displaced into engagement with the socket and the device is tested. After a device has been tested, the handler disengages the device from the socket. The handler removes the tested device from the test station and delivers it to an output station. At the output station, each tested device is placed in one of several trays on the basis of the test result. The trays are removed from the handler for further processing of the devices.
In the conventional test system, the weight of the test head is supported by the stand-alone manipulator, which is distinct from the device handler. The manipulator is able to adjust the position of the test head relative to the handler in three linear degrees of freedom and three rotational degrees of freedom. This allows the manipulator to be used with different test heads and different handlers, each having different requirements regarding positioning the test head relative to the handler.
It has hitherto been conventional to fabricate the pin electronics circuits of a semiconductor test system using an integrated circuit technology, such as TTL technology, that results in the pin electronics circuits of the conventional test systems being bulky and having high power consumption. These two factors have necessitated that the pin electronics circuits be accommodated in the power server, which is separate from the test head and is provided with means for cooling the pin electronics circuits. The power server is connected to the test head by a cable composed of several signal wires for each pin of the test head. For example, if the test head has 256 pins, the cable may have 512 or more signal wires. The cable may also contain spare signal wires, against the possibility of wires being damaged, and it may also include power lines. Since the signal wires may have to conduct signals at high frequencies, the signal wires must also be shielded, which is accomplished by including ground wires in the cable. The cable is therefore exceedingly bulky and heavy and measures must be taken to support the cable between the server and the test head. Generally, this has involved the power server being associated closely with the manipulator since the manipulator can then be used to support the cable.
Because the pin electronics circuits of the conventional test system require cooling facilities and are accommodated in the power server, the power server of the conventional test system is very bulky.
The power server of the conventional semiconductor test system has a user interface, including a keyboard and a display monitor, to allow the operator to control operation of the power server.
A device handler that is currently available is the MCT 7632 Fine Pitch Device Handler manufactured by Micro Component Technology, Inc. of Shore View, Minn. This handler is generally rectangular when viewed in plan and occupies an area about 2 m.times.1.7 m. The input and output stations are located near one of the long sides of the handler and the test station is located near the other long side of the handler. The handler includes a computer which controls operation of the handler. A user interface for the handler computer, including a keyboard and display monitor, is located adjacent the input station so that the operator can observe loading of devices into the handler while at the user interface of the handler computer. The MCT 7632 Fine Pitch Device Handler includes a sturdy mechanical support structure which supports the functional components of the handler.
The mechanical support structure of the MCT 7632 Fine Pitch Device Handler includes a frame and a shell. The geometry of the shell defines the external dimensions of the handler. Several functional components of the handler, such as handler computer, are accommodated inside the shell. However, the interior space of the shell is not completely filled with functional components of the handler, so that there are several vacant spaces inside the shell. This feature allows some flexibility in locating components inside the shell. For example, possible locations for the processing unit of the handler computer include a location about half way along one of the short sides of the handler and a location adjacent the input station.
When the MCT 7632 Fine Pitch Device Handler is used in conjunction with a conventional manipulator and power server, the manipulator is positioned for supporting the test head over the test station and guiding the cable from the power server to the test head. The cable must be long enough to accommodate a wide range of movement of the test head without creating any sharp bends in the cable, which implies that the cable must be quite long. This leads to the power server typically being at a substantial distance, e.g. at least 1 m, from the handler. Accordingly, the envelope of the test system covers an area about 2.7 m.times.2 m.
More recently, test systems have been built with CMOS pin electronic circuits, which are less bulky and operate at lower power levels than their TTL counterparts, and this has allowed the pin electronics circuits to be accommodated in the test head. In this type of test system, the cable connecting the power server to the test head does not need to contain several signal wires for each pin, in addition to power supply lines, but can instead contain a bus which supplies instructions to the pin electronics circuits. The cable used with a test system having CMOS pin electronics circuits in the test head is therefore much lighter and less bulky than the cable used with a TTL power server.
In addition, in a test system employing CMOS pin electronics circuits in the test head, the power server can be made very much more compact than the conventional TTL power server, since it is not necessary to accommodate either the pin electronics circuits or cooling facilities for the pin electronics circuits.
The cost of testing a semiconductor integrated circuit device can be a significant component of the total cost of producing the device. Part of the cost of test is the cost of providing the physical resources required to accommodate the test system and the cost of providing the physical resources depends on the floor area occupied by the test system. Since it is generally necessary to accommodate the test system in a clean room, and the cost per unit floor area of a clean room is quite high, it is desirable that the floor area occupied by the test system be minimized. In the conventional test system, the floor area occupied by the entire test system is substantially greater than the floor area occupied by the handler alone because the manipulator and power server are outside the footprint of the device handler.